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HSS-8316-DSP PXI Express QSFP FPGA Board

  • AMD XCKU115 or XCKU085 FPGA
  • 8-lane PCI Express Gen 3.0 (max 8 GBps) backplane interface
  • 4X QSFP High-Speed Serial ports (16 lanes total, up to 16.3 Gbps line rates)
  • 8 GiB DDR3 SDRAM (2 banks of 4 GiB)
  • 8 MiB QDR II+ SRAM


The HSS-8316-DSP FPGA board is a user programmable hardware platform with an 8-lane Gen3 PXI Express (PXIe) interface. It includes four QSFP ports (16 lanes) to support High Speed Serial (HSS) connections. The PXIe interface provides a maximum throughput of 8 GB/s while each QSFP port has 4 lanes supporting full duplex transfers at rates over 64 Gbps.

The board includes 8 GiB of DDR3 SDRAM and 8 MiB of QDR II+ SRAM. At the center of the design is an AMD Kintex Ultrascale FPGA which interconnects all ports and other devices while supplying additional resources within the FPGA. This particular FPGA contains a high count of DSP elements which uniquely suits this board for signal processing.

With the HSS lanes and 4 MMCX coaxial connections available, the board can be used for numerous applications that require high speed data connectivity with advanced DSP functionality. Each HSS lane can operate independently or in a bonded configuration if supported by the protocol being used. Popular HSS protocols that can be implemented include AMD Aurora, Interlaken, Serial FPDP, and ODI (Optical Data Interface) using optical or copper connectivity.

The FPGA is quickly loaded using the SPI x4 serial flash memory device. This provides the fast wake-up required for PCI Express. The user content can be encrypted with a key that is programmed in the FPGA in non-volatile EFUSEs or can be preserved in volatile memory so long as the on-board battery is not removed. This feature makes this product particularly attractive for applications in which protecting the FPGA intellectual property from cloning or reverse engineering is important.

To improve clocking flexibility, the board includes a Skyworks part that supports both integer and fractional divides. The provided VHDL project uses the internal I2C bus to initialize these clocks at power-up for the self test function and the user can also access the I2C bus if different frequencies are needed.

 


FPGA

AMD Kintex Ultrascale XCKU115 or XCKU085

High Speed Serial (HSS)

16 lanes (4x QSFP) with line rates up to 16.3 Gbps

Encryption

AMD eFUSE or battery-backed 256-bit AES bitstream

Form Factor

PXI Express dual slot

Additional External Connectors

4x MMCX for clock, trigger, or other signal IO
JTAG for AMD programing and debug

Dimensions

6.1875" (D) x 1.57" (W) x 5.0" (H)

Weight

< 1lb (0.5kg)

DRAM

8 GiB DDR3 SDRAM 2x512Mx64b @ 932 MHz

SRAM

8 MiB QDR II+ Extreme SRAM 4Mx18b @ 632 MHz

Clock Generation

Skyworks clock generator with integer and fractional divide

Power

Typical 35W (Power will vary depending on user programming and clock speeds)

PXIe Backplane Connections

PCIe Gen3 x8 (8GB/s)
All PXIe backplane signals connected (triggers, clocks, etc.)

IO Interface

UART interface (3 wire, RS-232 compatible)

User programmable LEDs

Faceplate visible: 2
Internal (back of board): 8

Flash Memory

Micron 1 Gib configuration flash (SPI, 4 bits)

Available AMD Xilinx FPGA Options

Kintex Ultrascale XCKU115

System Logic Cells 1,451,100
CLB Flip Flops 1,326,720
CLB LUTs 663,660
Distributed RAM 18.3 Mb
Block RAM 76.9 Mb
DSP Slices 5,250

Kintex Ultrascale XCKU085

System Logic Cells 1,088,325
CLB Flip Flops 995,040
CLB LUTs 497,520
Distributed RAM 13.4 Mb
Block RAM 56.9 Mb
DSP Slices 4,100

Warranty & Support

Conduant hardware products are backed by a limited one-year warranty. All software includes a 90 day warranty. Maintenance and priority support are available on a yearly subscription basis. Please contact your Conduant sales representative for more details.

Customer support is provided through a comprehensive web portal at www.conduant.com/support. Private logins and trouble ticket management are provided along with technical downloads, knowledge base, and other support tools.