The PXIe-8316-DSP FPGA board is a user programmable hardware platform with an 8-lane Gen3 PXI Express (PXIe) interface. It includes four QSFP ports (16 lanes) to support High Speed Serial (HSS) connections. The PXIe interface provides a maximum throughput of 8 GB/s while each QSFP port has 4 lanes supporting full duplex transfers at rates over 64 Gbps.
The board includes 8 GiB of DDR3 SDRAM and 8 MiB of QDR II+ SRAM. At the center of the design is an AMD Kintex Ultrascale FPGA which interconnects all ports and other devices while supplying additional resources within the FPGA. This particular FPGA contains a high count of DSP elements which uniquely suits this board for signal processing.
With the HSS lanes and 4 MMCX coaxial connections available, the board can be used for numerous applications that require high speed data connectivity with advanced DSP functionality. Each HSS lane can operate independently or in a bonded configuration if supported by the protocol being used. Popular HSS protocols that can be implemented include AMD Aurora, Interlaken, Serial FPDP, and ODI (Optical Data Interface) using optical or copper connectivity.
The FPGA is quickly loaded using the SPI x4 serial flash memory device. This provides the fast wake-up required for PCI Express. The user content can be encrypted with a key that is programmed in the FPGA in non-volatile EFUSEs or can be preserved in volatile memory so long as the on-board battery is not removed. This feature makes this product particularly attractive for applications in which protecting the FPGA intellectual property from cloning or reverse engineering is important.
To improve clocking flexibility, the board includes a Skyworks part that supports both integer and fractional divides. The provided VHDL project uses the internal I2C bus to initialize these clocks at power-up for the self test function and the user can also access the I2C bus if different frequencies are needed.
