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HSS-8324 PXI Express High Speed Optical FPGA Board

  • PXI Express single slot form factor
  • PXI instrument signals (triggers, clocks, etc.)
  • 8-lane PCI Express Gen 3.0 (max 8 GB/s)
  • Xilinx Kintex Ultrascale FPGA XCKU095-FFVB1760-2-E (others avail.) dual Interlaken cores
  • 24 optical channels (48 fibers) up to 16.3 Gbps per channel, 850nm
  • Dual 24 fiber MPO/MTP fiber connections
  • 8GB DDR3 SDRAM (25.6 GB/s)
  • 8MB QDR SRAM
  • Xilinx eFUSE or battery-backed 256-bit AES bitstream encryption
  • UART interface (3 wire, LVTTL compatible)
  • 4X MMCX external connectors
  • User programmable LEDs
  • 512MB configuration flash
  • Power and FPGA configuration status LEDs
  • JTAG interface for programming flash and FPGA debug
  • Microcontroller based power sequencing
  • Fractional divide clock synthesis
  • Xilinx power/temperature system monitor

The Conduant HSS-8324 Optical FPGA board provides the user with a hardware platform that is able to sustain full-duplex high-bandwidth transfers through its 8-lane Gen3 PXI Express (PXIe) interface and its 24-lane optical interface. The PXIe interface provides a theoretical maximum throughput of 8GB/s (simultaneous in and out).

The board provides both 8GB of high-speed DDR3 SDRAM and 8MB of QDR II+ SRAM. At the center of the design is a Xilinx Kintex Ultrascale (XCKU095-FFVB1760-2-E) FPGA which interconnects all ports and other devices while supplying the additional resources that are available within the FPGA. Other models of Kintex or Virtex Ultrascale FPGAs may be available; check with your Conduant sales representative.

With up to 48 optical fibers available, the board can be used for numerous applications that require high speed data connectivity. Each lane of optical fiber (transmit or receive) can operate independently. There are also dual Interlaken cores available in the FPGA which can be used to create dual 150 Gbps Interlaken connections (12 x 12.5 Gbps). Other optical protocols (i.e. Serial FPDP, Aurora, etc.) can also be used and a copper cabling option is available.

At power-on, the Kintex Ultrascale FPGA is quickly configured with the user program by using the SPI x4 serial flash memory device. This provides the fast wake-up required for PCI Express. The user content can be encrypted using a key that is either permanently programmed in a non-volatile manner into the FPGA (eFUSE) or can be preserved in a volatile manner so long as the on-board battery is not removed. This feature makes this product particularly attractive for applications in which protecting the FPGA intellectual property from cloning or reverse engineering is important.

The board includes a microcontroller for power management and an on-board I2C interface connecting the uC, FPGA, and optical transceivers.

For users who need more FPGA resources than are available in the XCKU095-FFVB1760-2-E, the pinout has been chosen to support migration to other, pin-compatible, Virtex/Kintex Ultrascale components. These variations can be provided by request.

PXI Express Revision

1.0 ECN 1

Interlaken Revision

1.2

Form Factor

PXI Express hybrid, peripheral of timing slot (1 slot required)

Dimensions

6.1875" (D) x 0.787" (W) x 5.0" (H)

Weight

< 1lb (0.5kg)

DRAM

8GB DDR3 SDRAM 2x512Mx64b @ 800MHz

SRAM

8MB QDR 2+Extreme SRAM 2Mx36b @ 600MHz

External Connectors

2x MTP/MPO 24 fiber (optional)
2x SMA 50 Ω

FPGA

Xilinx Kintex Ultrascale XCKU095-FFVB1760-2-E

Power

TBD